High Speed Serial Links Risk Assessment in Industrial Post-Silicon Validation Exploiting Machine Learning Techniques

Cesar A. Sánchez-Martínez,Paulo López-Meyer,Esdras Juárez-Hernández, Aaron Desiga-Orenday,Andrés Viveros-Wacher

2020 IEEE International Test Conference (ITC)(2020)

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摘要
Post-Silicon system margin validation consumes a significant amount of time and resources. To overcome this, a reduced validation plan for derivative products has previously been used. However, a certain amount of validation is still needed to avoid escapes, which is prone to subjective bias by the validation engineer comparing a reduced set of derivative validation data against the base product data. Machine Learning techniques allow to perform automatic decisions based on already available historical data. In this work, we present an efficient methodology implemented with Machine Learning to make an automatic risk assessment decision for derivative products, considering a large set of parameters obtained from the base product. The proposed methodology yields a high performance on the risk assessment decision, which translates into a significant reduction in time, effort, and resources.
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关键词
post-silicon validation,risk assessment,machine learning applications,system margin validation,support vector machines,neural networks,boosted trees
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