Speculative Barriers With Transactional Memory

Manuel Pedrero,Ricardo Quislant,Eladio Gutierrez,Emilio L. Zapata,Oscar Plata

IEEE Transactions on Computers（2022）

引用 3|浏览19

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摘要

Transactional Memory (TM) is a synchronization model for parallel programming which provides optimistic concurrency control. Transactions can run in parallel and are only serialized in case of conflict. In this article we use hardware TM (HTM) to implement an optimistic speculative barrier (SB) to replace the lock-based solution. SBs leverage HTM support to elide barriers speculat...

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关键词

Message systems,Instruction sets,Standards,Hardware,Protocols,Proposals,Computer architecture

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