Design of a Real-Time Simulator for Linear Circuits

Santiago Granda,Carlos Lopez,Alberto Sanchez

ieee andescon（2020）

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摘要

This paper presents the design of a real-time simulator for linear circuits of up to ten nodes using a Xilinx Zynq 7010 SoC. The document presents the required concepts related to linear circuit analysis and its associated numerical methods. Then, a conceptual design and its implementation in Verilog is presented. Pre- and post-synthesis simulation results are compared with theoretical PSpice simulation.

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关键词

Xilinx Zynq 7010 SoC,linear circuit analysis,associated numerical methods,conceptual design,post-synthesis simulation,theoretical PSpice simulation,Verilog,real-time simulator design,pre-synthesis simulation

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