A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing

IEEE Journal of Solid-State Circuits(2021)

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摘要
This article presents the first dedicated system-on-chip (SoC) that supports full data analysis workflow for genetic variant discovery for next-generation sequencing (NGS). The SoC implements four major steps: preprocessing, short-read mapping, haplotype calling, and variant calling. By adopting the sBWT-based short read mapping and Genome Analysis ToolKit haplotype caller-based variant calling algorithms, this work achieves a comparable precision as the software solutions. The dedicated hardware architecture achieves high parallelism with low hardware complexity. In this SoC, the multitask sorting engine and the dynamic programming processing engine are proposed for essential computing tasks for NGS data analysis. An ARC processor is integrated to facilitate IO interfaces, including a DDR3 PHY. Fabricated in a 28-nm technology, the chip area is 12 mm 2 . It dissipates 975 mW at a clock frequency of 400 MHz from a 0.9-V supply. The SoC is able to complete variant discovery for the whole human genome within 37 min. Compared with an optimized graphic processing unit solution, this work is 66 $\times $ faster and also achieves an $1.59\times 10^{4}$ times higher energy efficiency and 3086 $\times $ higher area efficiency. Verified with the FDA standardized benchmark, the SoC achieves a precision of 99.6%. The prototype system demonstrates the analysis procedure in real time for on-site DNA sequencing.
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关键词
Digital CMOS integrated circuits,haplotype calling,next-generation sequencing (NGS),short-read mapping,system-on-chip (SoC),variant calling
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