A LOW-PARASITIC CMOS TRANSISTOR STRUCTURE FOR WIDE LOCKING RANGE ILFD DESIGN

A wide locking range injection locked frequency divider (ILFD) with a low power consumption for 60GHz applications is presented. The locking range of the ILFD is enhanced by reducing the parasitic capacitances of the transistors. The cross-coupled transistor and injected transistors are integrated to become a compact structure, which exhibits simple routing and induces less parasitic capacitances. To verify the proposed structure, the ILFD was fabricated using 65 nm CMOS technology. It has a measured locking range of 55.3GHz to 67GHz (19%) with 0 dBm input power. The circuit dissipates 1.98mW at 0.5V supply voltage without the output buffers.