Design And Electromigration Study For A Stacked Distributed Power Amplifier

In this paper, the implementation and electro-migration (EM) study in GaAs pHEMT stacked distributed power amplifier (SDPA) is presented. A 0.2-7 GHz PA is designed using a 0.15 mu m GaAs pHEMT process, which employs 4-distributed 2-stacked-field effect transistors (FETs) to obtain about 1-watt output power with corresponding power added efficiency (PAE) of 26-32% within a very small chip size of 2.9 mm(2). Using the finite element analysis (FEA), the EM prediction for an SDPA is achieved effectively to find the weakest spot for the stacked distributed PA. This can provide valuable guidance for circuit design and analysis.