A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL

This paper proposes a power-efficient digital polar transmitter using 1.5bit-DSM-based Class-D PA and fractional-N injection-locked PLL. The DSM-based polar transmitter can avoid redundant charge/discharge of turned-off transistors in the conventional SCPA, which contributes to a drastic improvement in power efficiency at power back-off. The PLL is used as the phase modulator, and spur-mitigation technique is also applied to minimizes the frequency mismatch between the oscillator and the reference. The transmitter implemented in 65nm CMOS achieves a PAE of 29% at an EVM of -25.1dB, and a system efficiency of 21.7%.