Virtual Prototyping, Design for Reliability, and Qualification for a Full SiP Product Portfolio of a FOWLP Line

Low-Density Fan-Out (LDFO) (or Fan-out wafer-level-packaging) is a very popular technology for creating Systems in Package (SiP) designs. However, in reliability tests and in field use, cracks in the copper pads, in the redistribution layer (RDL) and in the solder balls are significant failure modes. To improve the package reliability, these risks need to be assessed during the design of the new products. This paper describes the architecture, the validation and the implementation of a numerical scheme for virtual prototyping, virtual design optimization, and virtual design qualification. The flexibility of the set of parametric finite element models is shown for an entire portfolio of new automotive SiP products in a LDFO fabrication line ranging from single die and multi-die to 3D stacked configurations. In addition, the new schemes are applied to study a novel pad design. Undulations have been introduced to prevent the permanent loss of electrical connection through complete pad cracking. The new modeling technique enables the semi-automated assessment of crack initiation and crack propagation in the copper pads and in the solder balls as well as the effects of delamination of the RDL dielectrics from the die. Experimental findings demonstrate the validity of the simulation results and the design recommendations deduced from them.