A Mixed-Phase SiO_x Hole Selective Junction Compatible With High Temperatures Used in Industrial Solar Cell Manufacturing

We present a p-type passivating rear contact that complies with integration into standard solar cell manufacturing with phosphorus-diffused front side. Our contact structure consists of a thin SiOx tunneling layer grown by wet chemistry and a stack of layers deposited in one single run by plasma-enhanced chemical vapor deposition. The layers of the stack were tailored to protect the interfacial oxide layer, to act as a source for boron diffusion into the wafer and to connect to the external metallisation with low contact resistivity. We found that this stack tolerated annealing at 900 °C over a wide range of dwell times: for 15 min anneals we obtained dark saturation current densities (J _o ) as low as 10 fA·cm ^-2 (after hydrogenation) and after 12-fold increase of the annealing time to 180 min, J ₀ was only increased to 12 fA·cm ^-2 . These values corresponded to implied open circuit voltages (iV _oc ) of 718 and 715 mV, respectively. To test passivating rear contacts under realistic operation conditions, we combined them with an n-type heterojunction into hybrid solar cells. With conversion efficiencies abovementioned 22% and V _oc > 705 mV, these devices demonstrated high level of rear surface passivation. Finally, we demonstrated the integration of the hole selective rear contact with a POCl ₃ diffusion process. To this end, we added a phosphorus diffusion barrier to our layer stack by depositing one additional layer of amorphous SiO _x on top of the stack. For symmetric samples with this layer structure on both sides, we observed iVoc values of 714 and 712 mV on n- and p-type silicon wafers after hydrogenation, respectively. Co-diffused cells with POCl ₃ front diffused emitter and rear passivating contact resulted so far in efficiencies of 20.4% and 20.1% for n- and p-type wafers, respectively.