Fully gate-all-around silicon nanowire CMOS devices

N. Singh, K. D. Buddharaju,A. Agarwal, S. C. Rustagi, G. Q. Lo,N. Balasubramanian,D. L. Kwong

SOLID STATE TECHNOLOGY(2008)

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摘要
Although CVD-grown nanowires are good for demonstration purposes, getting them into manufacring calls for the utilization of CMOS fabrication methods. We present fully CMOS-compatible nanowire technology with applications and fabrication challenges. Gate-all-around (GAA) silicon nanowire FETs are demonsrated with excellent gate electrostatic control and near ideal turn-on behavior. The nanowire CMOS inverter logic operates down to V-DD=0.2V and is indicative of the potential of these devices for ultra-low p cations toward the end-of-silicon technology roadmap. Finally we discuss the challenges specific to an advanced dielectric/electrode scheme in nanowire technology.
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