A Low Power Implementation Strategy for SOC

Low power consumption has become an extremely important design goal for system-on-chip(SOC). This paper analyzes the impact of power consumption on the digital chip and the composition of power consumption in the circuit, and then proposes a low-power implementation strategy for SOC system with embedded multi-core CPU. A master-slave control circuit is designed to reduce the static and dynamic power consumption of on-chip CPU and on-chip functional modules. Which not only improve the SOC chip on the functional modules and multi-core CPU switch flexibility, you can also reduce the total SOC system chip power consumption.