An In-Comparator Aperture-Time Equalization in a 7-nm FinFET CMOS 40-Gb/s Receiver

This letter proposes an in-comparator aperture-time equalization scheme using the impulse response of a clocked comparator. The technique is applied in a wireline link receiver prototype, implemented in CMOS 7-nm FinFET technology. The proposed method controls the aperture properties of the slicers by shaping their impulse sensitivity functions. We demonstrate an aperture skew control range of 4.7...