SOFT-ERROR SUSCEPTIBILITY OF FinFET SRAMs

INTRODUCTION For technology scaling beyond 20 nm, FinFET transistors will replace the conventional planar geometry. The driving force for the introduction of FinFET architecture is the superior immunity to short-channel effects and the reduction of the effects of process variation on device performance exhibited by the FinFET.[1-4] Figure 1 shows a comparison of architectures of the planar FET and the FinFET. One of the major concerns with the introduction of a new transistor architecture is ensuring that the transistor maintains the high level of reliability required for silicon circuits. Fortunately, in terms of reliability, the transition to FinFETs has been smooth; FinFETs do not introduce new reliability issues beyond those with which we are familiar.[4]