Design of an Efficient Full Adder for Low power Applications

Adders are the key building blocks of the ALU circuit. Arithmetic and logical unit plays a very important role in any of the systems. Any changes to adder circuit directly affect on the processor. By using proposed system it gives low power dissipation, more accuracy and at the same time it gives the fast of operation because we are reducing the transistors. The proposed system gives high speed with low area consumption. So compare to existed method the proposed method gives the better performance in terms of power delay and area. Instead of utilizing the more transistors here, we are using less transistors for the same work then we get the less area and at the same time concentrating on power dissipation and performance.