An Expert System Based Tool for Pre-design Chip Power Estimation

The power specification of a chip is generally developed during the product conception stage. Engineers select technology libraries, IPs, and make architectural decisions by weighing them against the impact on the power budget. In this paper, we present a knowledge-base (KB) system for pre-design chip power estimation, which uses post-layout power information from previous designs. KB rules are then used to perform specification analysis of a new design, against the KB, to estimate its power. We demonstrate our power estimation technique on a LEON3 System-On-Chip (SoC) design. Keywords-Knowledge-Base System, Specification Analysis, Power modeling, Pre-design chip power