High productivity ubm / rdl deposition by pvd for fowlp applications

Fan-Out Wafer Level Packaging (FOWLP) technology is an increasingly popular solution for obtaining high levels of device integration with a greater number of I/O contacts, at a lower cost. In all FOWLP schemes, such as InFO (TSMC), SWIFT/SLIM (Amkor), eWLB (STATS ChipPAC, ASE, NANIUM) and many others, singulated die are embedded in epoxy mold compound (EMC). While EMC is a costeffective material, it readily absorbs moisture, as do the polymer dielectrics used to electrically isolate adjacent metal interconnect lines. These materials must be degassed prior to physical vapour deposition (PVD) of under-bump metals and redistribution layers (RDL), otherwise metal to metal interfaces can be contaminated, impacting electrical performance of the device. With the low thermal budget of the EMC (<150°C), an effective degas requires low temperature and long process times that can significantly reduce throughput. SPTS has implemented a “Multi-Wafer Degas” solution to eliminate the "degas bottleneck” and ensure lowest contact resistance (Rc). This solution typically doubles the throughput compared with competing PVD systems, and is being used in high volume 300mm production. Prior to UBM/RDL metallization, native oxide needs to be etched from the exposed metal contacts. In the SPTS Sigma ® fxP PVD system, ICP technology is used to reduce the energy of ions at the wafer, and so limit the peak wafer temperature. In high density packages using multiple RDL, the upper interconnect level can present large exposed areas of metal to the pre-clean module, which can lead to a breakdown in RF coupling in ICP technology during etch. In addition, the presence of organic passivation such as PI or PBO can lead to premature particle failure due to the poor adhesion of organics to chamber furniture. This paper introduces a new pre-clean etch module, designed to provide ICP cleaning capability whilst overcoming the process and particle stability challenges posed by increased I/O contacts and organics. Data from systems in production will be presented, demonstrating the efficacy of the technology. The paper will show long time between chamber cleans in an ICP pre-clean module, and low & stable Rc data. System modifications for coping with epoxy mold wafer warpage and cost reduction efforts are also discussed.