Performance Analysis of Digital Circuits Device under Test at Different FPGA Families

Despite their tremendous success over the years, the Digital circuits are still confronted with some of the critical challenges such as, manufacture, maintenance, and repair. To fulfill this, digital integrated circuits industry defined an Integrated Automatic test generation (ATG) / Automatic Test Equipment System for complex boards / circuits, which comprises Low Cost, Reconfigurable and easy to use digital circuits. It allows circuit parameters to be extracted from HDL Simulation then functionality is verified by using Xilinx Environment. The aim is to develop an ATG technique called Behavior Based Automatic Test Generation technique (BBATG), where the system uses the structural model to describe circuit board as an interconnection of devices. Thus application of a deterministic algorithm to deduce the tests for complex circuit boards. Unlike most other deterministic ATG using the stuck-atfault model, BBATG use the device behavior fault model which can completely describe functions and pin timing relations for a combination or sequence device, and then needn‟t decompose devices to gate-level descriptions. The objective of the functional testing is to validate the correct operation of the system with respect to its functional specifications. Functional Testing is carried out for a small number of vector combinations. The main focus is based on easy-to-use and reconfigurable automatic test machine referred as FATE (FPGA-based ATE). So the test generation for digital circuits with VLSI can be further simplified and optimized. The designed FATE is verified with and without fault using Xilinx software and result are included.