Cmp$im: a Binary Instrumentation Approach to Modeling Memory Behavior of Workloads on Cmps Cmp$im: a Binary Instrumentation Approach to Modeling Memory Behavior of Workloads on Cmps

Chip multiprocessors are the next attractive point in the design space of future high performance processors. There is a growing need for simulation methodologies to determine the memory system requirements of emerging workloads in a reasonable amount of time. To explore the design space of a CMP memory hierarchy, this paper presents the use of binary instrumentation as an alternative to execution-driven and trace-driven simulation methodologies. Using the binary instrumentation tool, Pin, we present CMP$im to characterize cache performance, and data sharing behavior of multi-threaded workloads at the speeds of 4-10 MIPS.