Executable SystemC specification of the MARTE generic concurrent and communication resources under different Models of Computation

Modeling and analysis of real-time, embedded systems is becoming an important area of research nowadays. In this context, the UML MARTE profile has been proposed to support the specification, design, and verification stages in the design process. It provides a wide set of facilities to introduce all the information required in the first steps of the design process. To carry out the actions involved in these design steps, MARTE-based tools are required. This paper presents a methodology to automatically generate SystemC executable specifications from generic MARTE models. The methodology proposed is based on the SystemC language. SystemC is a C++ extension, widely used in the electronic design community to generate executable specifications of embedded systems. To generate these specifications, the information regarding the system structure and hierarchy is extracted from the MARTE models. A subset of concurrency and communication features of the MARTE profile is used for this purpose. Thus, semi-automatic generation of the executable specifications is possible. Then, the code required to describe the system operations can be easily integrated into the executable code. This design methodology establishes a refinement flow to perform the design steps before deciding system partitioning.