Design of logarithm based floating point multiplication and division on fpga

Logarithmic number systems (LNS) find many of its applications in the field of multimedia, digital signal processing, scientific computing and artificial neural networks due to logarithm and antilogarithm elementary functions. In this paper, logarithm based single precision floating point arithmetic units are designed based on look-up table method that computes various functions like log, antilog, rounding and exponential terms. This paper is focused in the efficient design of logarithmic floating point multiplication and division. Compared to conventional floating point arithmetic units, this work presents the design by using the same hardware for performing logarithmic operations, antilogarithm, rounding and exponential functions. Hence this work is found to be efficient in terms of area and speed compared to the design of conventional floating point arithmetic designs. Synthesis results were obtained in Xilinx SPARTAN and VIRTEX FPGA devices. Comparative results were presented for conventional floating point arithmetic units and log LUT based arithmetic designs.