Investigations on implementation of ternary content addressable memory architecture in spartan 3e fpga

1Mtech scholar, Department of ECE, GECI, Kerala, India 2Associate Professor, Department of ECE, GECI, Kerala, India ---------------------------------------------------------------------***--------------------------------------------------------------------Abstract – The Field Programmable Gate Array (FPGA) implementation of Ternary Content Addressable Memory (TCAM) is a demanding area of research to address the requirements of data base querying systems and high speed networking. Major investigation area in the Content Addressable Memory (CAM) architecture design is the performance metrics such as area, power and latency in the context of miniaturization, high speed and low power requirements of electronic gadget market. Z-TCAM is one of the latest popular architectures available in FPGA based TCAM. This paper is an investigation on implementation of Z-TCAM architecture in a low cost FPGA platform. The chosen hardware implementation platform is Digilent Basys2 board which works well with all versions of Xilinx Integrated Synthesis Environment (ISE) tool and free Web Pack. The architecture under study is implemented in SPARTAN 3E FPGA to obtain hardware utilization of 12.26%, latency of 3110.55 nS and power consumption of 45.16 mW.