Optimal Approach to Scaling of the NEMS for Low Stand-by CMOS Applications

We report here for the first time, a simple novel scaling approach is proposed to achieve low pull-in voltage (V pi ), delay (t delay ), energy (U) and mechanical stress (σ) in the NEMS analogous to MOSFETs dimensional scaling. The study provides an efficient design methodology to achieve user specified percentage improvement of a specifically targeted parameter (V pi, t delay, U or σ) with the improvement in other target parameters. The approach is validated with reported experimental data and simulations.