Latent Defect Screening with Visually-Enhanced Dynamic Part Average Testing

In this work, a novel outlier detection method is presented in which the data from the visual inspection of manufactured wafers are combined with the data from the electrical test. Three different implementations are built with increasing complexity in order to detect outliers that are not detected by a traditional outlier detection method such as the Dynamic Part Average Testing (DPAT). The screening parameters are constructed as a reformulation of the DPAT formulas, integrating information from visual inspection and the layout of the used product. The proposed VEDPAT algorithms are applied to a total of 25 wafers spread over 5 lots in order to compare their effectiveness. The results show that a method that combines the available information with the layout is able to effectively screen out outliers at the expense of only a very small yield loss. Also, details and microscope pictures of the false alarms and outliers detected by the method are presented.