FPU Bit-Width Optimization for Approximate Computing: A Non-Intrusive Approach

Floating-Point Units (FPUs) count as a significant part of computing resources in modern general-purpose and application-specific processors. Full-precision FPUs can be a source of extensive hardware overhead (power consumption, area, memory footprint etc.). On the other hand, several applications feature the inherent ability to tolerate precision loss. This has lead to the development of a new computing paradigm: Transprecision Computing (TC), where variable and arbitrary precision hardware FPUs have been introduced. Many tools and libraries have been proposed to simulate the effects of approximation on applications, to help designers to select the most optimized FPU architecture adequate for a given application. However, existing techniques require developers to rewrite part or all of their existing software stacks (applications, libraries, operating systems ...), which is often infeasible, complex or at least a very time-consuming development effort. This work proposes a non-intrusive approach, which does not need source code modification, by introducing approximations at the low-level in assembly. This allows approximating virtually all kinds of executable binaries (bare-metal applications, single- /multi-threaded user applications, OS/RTOS, etc.). We implement the approach on top of the well known QEMU dynamic binary translator. We perform experiments on a set of benchmarks from the literature, and we demonstrate how the approach further simplifies evaluating the impact of FP approximations on numerical applications outputs, without being intrusive to the source code.