13.4 A 22nm 1mb 1024B-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6gb/s Read Bandwidth for Security-Aware Mobile Devices
2020 IEEE International Solid- State Circuits Conference - (ISSCC)（2020）
Key words
near-memory computing unit,1-cycle access,security applications,dual-mode operations,memory mode,reported NVM macros,logic area,NVM access,near-memory-computing dual-mode STT-MRAM macro,security-aware mobile devices,secure hash algorithm,advanced encryption standard,data encryption,read-access time,nonvolatile memory,high-read bandwidth,on-chip NVM,advanced process,area overhead,STT-MRAM macros,security-related applications,parallel-IO readout,high peak current,sequential wide-IO readout,conventional memory-logic-separated scheme,NVM-based security logic operations,multibit current-mode SA,MB-CSA,time 275.0 ns,voltage 0.85 V,byte rate 42.67 GByte/s,time 170.0 ps,size 22.0 nm
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