6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology

2020 IEEE International Solid- State Circuits Conference - (ISSCC)(2020)

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摘要
Explosive growth in mega-scale data centers drives switch chips to transition from 12.8Tb/s to 51.2Tb/s throughput. A 51.2Tb/s switch requires 512 lanes operating at 106Gb/s PAM-4. Such a massive integration of electrical SERDES is restrained by three factors: First, a large switch die size (>25×25mm 2 ) substantially lowers yield and prohibitively increases cost. Second, a large-size package suffers more than 10dB insertion loss from combined TX and RX traces. Considering practical equalization capabilities of a long-reach system (>30dB), 10dB package loss significantly limits the available channel reach. Lastly, channel reflection and cross-talk are excessive at 100Gb/s, which puts a ceiling on attainable BER.
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关键词
DSP-based transceiver,long-reach system,loss compensation,mega-scale data centers,switch chips,PAM-4,electrical SERDES,large-size package,insertion loss,combined TX and RX traces,equalization capabilities,package loss,channel reflection,crosstalk,BER,FinFET technology,current 6.2 A,power 460.0 mW,size 7.0 nm,bit rate 112 Gbit/s,bit rate 12.8 Tbit/s to 51.2 Tbit/s,loss 38 dB,bit rate 106 Gbit/s,loss 10 dB
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