A Mixed-Signal RF Pulse Width Modulator With High Time Resolution Utilizing Passive Delay Lines

We present a novel mixed-signal single-output outphasing RF Pulse Width Modulator (RF PWM) realized in 40nm CMOS. Two Digital-to-Time Converters (DTCs) synchronously phase shift an external LO according to two 9-bit outphasing input words. Coarse time quantization is provided by tapping the internal nodes of passive integrated LC delay lines. Finer resolution is added using switching capacitors of a Gm-C circuit attaining minimum time steps of 6ps/750fs respectively. “Hair-pin” inductors with minimized footprint have been employed for the silicon realization of each LC delay line. Measurement yields an ACLR of approx. -42 dBc from a 32 MHz BW multi-tone signal on a 2.65 GHz carrier.