Spice Modeling And Simulation Of High-Performance Wafer-Scale Mos2 Transistors

This paper presents a SPICE model for two-dimensional (2D) layered materials (MoS2) field-effect transistors (FETs) based on mobility calibration. We simulated the output characteristics of two different types of MoS2 devices, single-layer (1L) and multilayer (ML) MoS2 devices, based on this model. The excellent agreement between experimental data and simulation results verified the accuracy of the model. In order to further verify the reliability of the model, we also designed a rationed logic inverter based on ML MoS2 device and simulated its voltage transfer characteristics (VTC). Simulation results matched well with the experimental results.