FOPAC : Flexible On-Chip Power and Clock
IEEE Transactions on Circuits and Systems I: Regular Papers(2019)
摘要
A novel flexible on-chip power and clock (
FOPAC
) generation and distribution circuit is proposed to enable fast dynamic voltage and frequency scaling (DVFS).
FOPAC
utilizes resonant rotary clocks (ReRoCs) along with multi-phase voltage regulators (MPVR) for the clock and power generation and distribution. The locally distributed ReRoCs provide the required clock phases to the MPVR, and the MPVR provides the required voltage levels to the ReRoC, providing spatial and temporal flexibility for fast DVFS. The ReRoC and MPVR share the on-chip fly capacitor of the switched capacitor voltage regulators to achieve greater frequency scaling at run-time while reducing the overhead. The
FOPAC
architecture is evaluated on industrial designs demonstrating a <2 ns DVFS switching time.
更多查看译文
关键词
Resonant rotary clock,voltage regulators,low power,VLSI
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要