Sub-0.1v Input, Low-Voltage Cmos Driver Circuit For Multi-Stage Switched Capacitor Voltage Boost Converter

This paper proposes an extremely-low-voltage CMOS driver circuit for multi-stage switched-capacitor (SC) voltage boost converter (VBC). The SC VBC using a conventional driver could not generate sufficient boosted clock signals when the input voltage becomes low. This is because the output voltages of the driver degrade significantly as the input voltage decreases. To mitigate the problem, we develop the low-voltage CMOS driver circuit to improve the low-voltage operation of the SC VBC. The proposed driver consists of a ring oscillator, non-overlap clock generator, and main driver (MD) circuits. Simulated results demonstrated that the proposed driver can generate sufficient amplitude of the clock signals and the SC VBC using the proposed driver generates a 600-mV output from a 100-mV input when the voltage conversion ratio of the VBC is set to 6. The peak efficiency was 48.9% at 120-nA load current. The driver circuit can operate at 79-mV input voltage.