Software-Based Self-Test for Transition Faults: a Case Study
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)(2019)
摘要
Scan chain-based testing is a de facto standard for guaranteeing quality of manufactured digital circuits. However, functional approaches are often used to complement test suites, especially when analog circuitry is integrated in the chip. Software-Based Self-Test (SBST) can be used to increase defect coverage also in digital parts, or to replace part of the scan pattern set to reduce tester requirements, or to complement the defect coverage achieved by structural techniques when advanced semiconductor technologies introduce new defect types. This paper deals with SBST targeting transition delay faults, and describes a case of study based on a peripheral module integrated in a System on Chip (SoC). A method to develop an effective functional test is first described. A comparative analysis of the delay faults detected by scan and SBST is then presented, together with some discussion about the obtained results.
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关键词
Software-based self-test,transition delay faults,VLSI,microcontrollers,peripherals
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