Current SiC Power Device Development, Material Defect Measurements and Characterization at Bosch

This paper consists of two parts, where the first gives an overview of current power device development on 150 mm 4H silicon carbide (SiC) taking place at Robert Bosch GmbH in Reutlingen. The general process flow is explained and its separation in three distinctive groups, i.e. trench etched metal-oxide semiconductor (Trench-MOS) fabrication, ion implantation and metallization, is motivated. A brief overview, as well as a deeper explanation of three of the most important processes concerning wafer quality for SiC MOS field-effect transistor (MOSFET) power device development is given. These processes include epitaxy, high temperature oxidation, ion implantation, as well as activation of implanted ions. It is also highlighted why established methods and respectively equipment available through previous development and ongoing silicon production can only be used partially.The second part describes the influence of diverse processes on the SiC surface morphology and intrinsic crystal structure. A non-destructive 4H-SiC material characterization method is used for defect analysis in SiC substrates and epitaxial layers. The method at hand for SiC defect detection connects confocal microscopy and ultra-violet photo-luminescence (UV-PL) scanning.These defect measurement methods allow for both a characterization and classification of a wide range of different surface and intrinsic defects respectively in SiC wafer. During these material defect investigations we focus on intrinsic basal-plane dislocations (BPDs), as well as on different types of stacking faults (SFs) and triangular defects.