Capture And Emission Mechanisms Of Defect States At Interface Between Nitride Semiconductor And Gate Oxides In Gan-Based Metal-Oxide-Semiconductor Power Transistors

A physical insight into the capture and emission behavior of interface/oxide states in a GaN-based metal-oxide-semiconductor (MOS) structure is of great importance to understanding the threshold voltage (V-TH) instability in GaN power transistors. A time-dependent V-TH shift in Ni/Al2O3/AlGaN/GaN MOS-HFETs (heterojunction field-effect transistors) and a distribution of Al2O3/III-nitride interface states (D-it) were successfully characterized by constant-capacitance deep level transient spectroscopy. It is found that in situ remote plasma pretreatments in plasma-enhanced atomic-layer-deposition could suppress Dit (E-C-E-T > 0.4 eV) down to below 1.3 x 10(12) cm(-2) eV(-1). Under high applied gate bias (e.g., V-G > 8 V), tunnel filling of oxide states in the Al2O3 dielectric comes into play, contributing to remarkable V-TH instability in the MOS-HFETs. The tunnel distance between the 2D Electron Gas (2DEG) channel and oxide states E-T,E-ox in the Al2O3 dielectric decreases from 3.75 to 0.82 nm as VG increases from 2 to 8 V. A further increase of V-G to 11 V makes the Fermi level approach E-T,E-ox (E-C - E-T similar to 1.62 eV), which may enable direct filling. High electric field induced tunnel filling of gate oxide states could be an assignable cause for VTH instability in normally-OFF III-nitride MOS-HFETs. Published under license by AIP Publishing.