Efficient Iterative Process based on an Improved Genetic Algorithm for Decoupling Capacitor Placement at Board Level

ELECTRONICS(2019)

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Abstract
To reduce the noise created by a power delivery network, the number, the value of decoupling capacitors and their arrangement on the board are critical to reaching this goal. This work deals with specific improvements, implemented on a genetic algorithm, which used for the optimization of the decoupling capacitors in order to obtain the frequency spectrum of the input impedance in different positions on the network, below previously defined values. Measurements are performed on a specifically manufactured board in order to validate the effectiveness of the proposed algorithm and the optimization results obtained for a specific example board.
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Key words
decoupling capacitors,power delivery network,binary genetic algorithm,twin removal,binary coding,power integrity,signal integrity
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