A SoC-based acceleration method for UAV runway detection image pre-processing algorithm

Runway detection algorithm is the foundation for ensuring the effectiveness of vision based Unmanned Aerial Vehicle (UAV) autonomous landing, which accomplishes landing site perception through large number of images. Considering the real-time demand of fixed-wing UAV landing and the onboard constraints, the image pre-processing system designed in this paper is built on Zynq-7000 platform. After optimizing image scaling algorithm and saliency analysis algorithm based on frequency domain residuals, IP cores are generated via Xilinx's Vivado HLS tool for specific modules of the algorithm and added to the image pre-processing system under the SoC collaborative architecture. This architecture combines both advantages of both FPGA and ARM, with parallel processing and subsystem control capabilities. The experimental results verify the SoC collaborative acceleration based onboard runway detection system for UAV landing can process up to 20 frames per second, which is nearly 20 times faster than ARM.