Split-Gate FeFET (SG-FeFET) with Dynamic Memory Window Modulation for Non-Volatile Memory and Neuromorphic Applications

In this work, we propose a novel split-gate FeFET (SG-FeFET) with two separate external gates to dynamically modulate the memory window (MW) for non-volatile memory and neuromorphic applications. During read operation, only one gate is turned on to decrease the area ratio (A(FE)/A(IL)) of ferroelectric layer to insulator layer, which increases MW and read current ratio (I-Read_1/I-Read_0). During write operation (program/erase), both two gates are turned on to increase A(FE)/A(IL), which decreases MW, thereby resulting in lower write voltage (V-write). Compared to FeFET, SG-FeFET (1) Demonstrates lower V-write (=1.85V) and 59.5% reduction in write energy at fixed I-Read_1/I-Read_0; (2) Exhibits lower read energy (-11.3%) and higher I-Read_1/I-Read_0 (=8.6E6) at fixed V-write; (3) Allows random access and eliminates half-select disturb; (4) Preserves higher endurance due to lower V-write and charge trapping. SG-FeFET as synaptic device also exhibits superior symmetry and linearity for potentiation and depression process.