Voltage Scaling and Guardband Customization of Multiple Constituent Components in SoC-FPGA

The ever-growing demands for increased speed and low power has led to the development of sophisticated and complex heterogeneous chips consisting of multiple components, such as memories, processors, DSPs, and classical FPGA resources, which operate with diverse specifications. However, their vendor-defined specifications are quite conservative to enable meeting the most demanding application scenarios. Consequently, a surplus of energy consumption is measured in practice. This work focuses on the customization of the operating parameters in SoC-FPGA chips, when executing a HW/SW co-designed application that utilizes multiple of the constituent components of the system. We demonstrate that the nominal application throughput can be attained when multiple components of the SoC are individually fine-tuned to distinct voltage levels, specific to the given application, thus leading to improved energy footprint.