Flicker Noise Simulation by Physical Trap Model

Flicker Noise is the most important noise source for silicon CMOS, and it is very crucial for RF applications.In this report, we are able to simulate flicker noise by physical trap-detrap model with Sentaurus software, which computes the noise source at every vertex. The traps are set within dielectric layers in simulation with different concentration, space location and energy level. The carriers can tunnel between silicon and the oxide with WKB method, and be captured or emitted by normal trap model. A set of parameters along with optimized mesh are modified for good alignment with silicon data in different biases.With integrated drift-diffusion models, which is well calibrated to include the quasi-ballistic effect, we can study the device performance and flicker noise simultaneously. With a full set of device and noise models, we have demonstrated that the flicker noise can be reduced to 0.6×BL without any additional mask. And the results for doping splits matched silicon well.