Advanced 22nm Fd-Soi Technolgy With Metal Gate Last Process

In this work, we demonstrate an advanced 22 nm fully depleted silicon-on-insulator substrate (FD-SOI) process for very large scale integrated circuit (VLSI). The fabrication process features hybrid substrate, epitaxy for raised source/drain, high-k/metal gate and trench silicidation. For the first time, high-k first/metal-gate last process is applied. The metal-gate last process allows wide choice of metal materials to tune the threshold voltage of the transistor. The fabricated n-type and p-type MOSFETs show very low subthreshold swing and limited drain induced barrier lowering (DIBL) effect.