Energy and Error Reduction using Variable Bit-width Optimization on Dynamic Fixed Point Format

In today's era of IoT, big data and AI, a lot of emerging applications are limited by the system's power and energy capability. Since many of these applications have relatively high resistance to computational errors, it becomes a hot topic to study the accuracy vs. energy trade-off. Several approaches have been proposed to optimize the bit-width in the fixed-point arithmetic operations. They mainly focus on the fraction part with little consideration on the integer part. In this paper, we take advantage of the dynamic fixed point format to expand the scope of bit-width optimization for both the fraction and integer parts. More specifically, we propose a real-time variable bit-width allocation technique to dynamically reduce the precision of the operands and hence balance the accuracy loss and the energy reduction. More importantly, existing approaches are application specific and the bit-width has to be optimized for each application, but our approach is designed for general purpose computations. We implement our approach and evaluate it on 9 commonly used test benchmarks. The results demonstrate that our technique can reduce the error rate on average by 57% over the traditional design given the same amount of energy budget. On the other hand, to reach the same level of computation accuracy, our technique can achieve more than 20% energy saving.