Overview of spin-based majority gates and interconnect implications

I. P. Radu, O. Zografos,A. Vaysset, F. Ciubotaru,M. Manfrini, P. Raghavan, S. Sayan,C. Adelmann, Zs. Tökei,A. Thean

2016 IEEE International Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC)(2016)

引用 2|浏览49
暂无评分
摘要
In this paper we review majority gate devices based on spintronic phenomena. We focus the discussion on spin wave majority gates and report on benchmarking and place and route experiments for these devices. We find that these devices could help not only reduce power consumption, but in certain instances also reduce the amount of wiring required compared to the CMOS equivalent.
更多
查看译文
关键词
CMOS,power consumption,spin wave majority gates,spintronic phenomena,interconnect,spin-based majority gates
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要