A complete formal semantics of x86-64 user-level instruction set architecture

Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation(2019)

Cited 84|Views72
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Abstract
We present the most complete and thoroughly tested formal semantics of x86-64 to date. Our semantics faithfully formalizes all the non-deprecated, sequential user-level instructions of the x86-64 Haswell instruction set architecture. This totals 3155 instruction variants, corresponding to 774 mnemonics. The semantics is fully executable and has been tested against more than 7,000 instruction-level test cases and the GCC torture test suite. This extensive testing paid off, revealing bugs in both the x86-64 reference manual and other existing semantics. We also illustrate potential applications of our semantics in different formal analyses, and discuss how it can be useful for processor verification.
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Key words
Formal Semantics, ISA specification, x86-64
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