Systolic Building Block for Logic-on-Logic 3D-IC Implementations of Convolutional Neural Networks.

H. T. Kung,Bradley McDanel,Sai Qian Zhang,C. T. Wang, Jin Cai,C. Y. Chen,Victor C. Y. Chang,M. F. Chen,Jack Y. C. Sun,Douglas Yu

2019 IEEE International Symposium on Circuits and Systems (ISCAS)（2019）

引用 8|浏览39

关键词

systolic building block,logic-on-logic 3D-IC implementations,convolutional neural networks,building block architecture,systolic array 3D-IC implementations,convolutional neural network inference,chip design service provider,energy-efficient CNN inference,microbump/TSV,systolic arrays scale

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