Development of cost effective Copper overburden removal for Via-Last TSV fabrication

Through Silicon Via (TSV) is a high performance interconnect technique to enable 3D packaging. Compared to conventional 2D packaging using wire bonding or flip chip bonding, the length of the connections arc shorter thus the interconnect and device density become higher. In this paper, we explored how combination of wet etch and Cu CMP can improve microscopic flatness for overburden removal after TSV Cu filling, while keeping the process cost low for Via Last TSV fabrication.