Phase stabilization design for radio-frequency system of the IMP HIRFL-SSC

The Radio Frequency (RF) system at the Heavy Ion Research Facility in Lanzhou of the Institute of Modern Physics was upgraded to a digital low-level radio frequency system. The key part is the phase and amplitude negative feedback system based on Digital Signal Processing (DSP) and a Field Programmable Gate Array (FPGA). This paper mainly introduces the design of the phase stabilization loop, including the principle designs for phase stabilization, loop filter design, parameter calculation, and hardware. In order to improve the performance and stability of the system, the loop filter was designed by means of zero-pole cancellation. In this paper, the derivation of the “zero pole cancellation method” is introduced in detail. The implementation structure of the loop filter in the FPGA is an ingenious design that can be applied to RF systems with different cavity loaded quality factor (QL) values. For different RF systems, the parameters of proportional integral (PI) algorithm are fixed, and only one parameter QL needs to be set. An economical compensation method for the temperature drift in the pick-up cables was designed to improve the control accuracy of the system. The phase control system was tested in long-term stability experiments, and the results show that the system has excellent phase stability over the long term, as well as parasitic phase modulation suppression.