Superior Performance of 5 nm Gate Length GaN Nanowire nFET for Digital Logic Applications

We investigate the performance of 5-nm gate length GaN nMOS nanowire field effect transistor (GaN-NW-nFET) of various geometrical shapes, around the limits of cross-sectional scalability, using atomistic quantum transport simulations. For square cross-sections, the benchmarking results with the simulated Si-NW-nFET reveal over 30% enhancement in GaN drive current in both low standby power (LP − $I_{ \mathrm{\scriptscriptstyle OFF}}=1$ nA/ $\mu \text{m}$ ) and high performance (HP − $I_{ \mathrm{\scriptscriptstyle OFF}}=100$ nA/ $\mu \text{m}$ ) applications. Further performance enhancement is observed with the use of non-square geometries that are akin to GaN’s wurtzite crystal structure. Particularly, for ${T}_{\text {nw}}=2.4 $ mn, triangular cross-section GaN-NW-nFETs exhibit the smallest subthreshold swing, down to 62 mv/decade, excellent drive current, ${I}_{\text {DSAT}} > 2\times 10^{6}\,\, \mu \text {A}/ \mu \text {m}^{2}$ and superior energy-delay product compared to simulated Si-NW-nFET.