Energy Efficient Adder for Bio-Medical Applications

Recent developments in sensors and novel device structures have opened up many new possibilities in medical field, especially in implantable medical devices. The battery recharge timing places stringent requirements on power consumption by these devices. The design of energy-efficient circuits and systems thus becomes more crucial. Adder is the basic building block for all these devices. In this paper, a 4-bit Brent-Kung adder is implemented with a new adiabatic logic family derived from the PFAL, denoted as modified PFAL or MPFAL and using FinFET device. The performance of the adder circuit is analyzed by comparing the power dissipation and delay with that of static CMOS and PFAL designs. The simulation results indicate reduction in power dissipation of 98% and 96% over static CMOS and PFAL designs. The delay improvement is 24% for MPFAL circuit.