Psss Transmitter For A 100 Gbps Data Rate Communication In Thz Frequency Band

2018 26TH TELECOMMUNICATIONS FORUM (TELFOR)(2018)

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Abstract
Parallel sequence spread spectrum (PSSS) is a versatile spreading technique suitable for high-speed wireless communication. We are aiming for transmission rates up to 100 Gbps in the terahertz frequency band. Here, we propose a novel transmitter architecture comprising of 15 parallel PSSS encoders used in conjunction with a high-speed analog multiplexer (MUX) and DACs. In our design, PSSS encoders (with 4 bit/s/Hz spectral efficiency) and DACs operate a low symbol frequency of 1.67 GHz wherein the analog MUX runs at a chip rate of 30 GHz to achieve 100 Gbps. Our scheme is based on a parallel PSSS encoding of the input signal using an analog MUX to process the parallel output results. To demonstrate the potential of a parallel PSSS encoding, we verified the transmitter architecture on Virtex ultrascale FPGA (VCU108) and implemented the design on GlobalFoundries 28 nm FDSOI technology, showing a PSSS symbol rate of 1.785 GHz to achieve above 100 Gbps. The transmitter design of 15 parallel encoders occupies a chip area of 0.0073 mm(2) with a power consumption of 20.882 mW and has an energy efficiency of 0.21 pJ/bit.
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Key words
100Gbps, 28nm, Digital ASIC, DAC, FPGA, PSSS, PHY Layer, submillimeter-wave, spread-spectrum modulation, terahertz
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