Design and Implementation of VHDL for High Speed Interleaver in Tactical Data Link
2018 International Conference on Sensor Networks and Signal Processing (SNSP)(2018)
Abstract
This paper introduces the channel coding of data link system, and analyzes the principle and algorithm of interleaved codec in data link. Based on this, a convolutional interleaving codec for RS (204, 188) code is designed and implemented by VHDL. The data delay is realized, and the function of convolutional interleaving is completed. The design has the advantages of simple implementation and low resource consumption.
MoreTranslated text
Key words
data link system, convolutional interleaving, VHDL
AI Read Science
Must-Reading Tree
Example
![](https://originalfileserver.aminer.cn/sys/aminer/pubs/mrt_preview.jpeg)
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined