Design of Power Clamp Circuit with Diode String and Feedback Enhanced Triggering in advanced SOI BCD Process

2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT)(2018)

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摘要
A novel power clamp circuit is proposed in this paper. By utilizing the feedback technology, BigFET turning on time is increased to 591ns which is 7 times as long as the traditional one. The layout area is efficiently occupied in the novel power clamp circuit which replaces the detective capacitor by a diode string. The proposed circuit has low leakage current and significant ESD performance validated in a 0.18μm SOI BCD process.
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关键词
Electrostatic discharge (ESD), power clamp circuit, feedback technology, BigFET
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